Multi-Source Multilevel Inverter with Minimum Number of Power Semiconductor Switches

Abstract

This paper presents a 15-level multilevel inverter (MLI) and a 31-level MLI with minimum number of power semiconductor switches. The proposed MLIs uses asymmetric DC sources and minimum numbers of power MOSFET switches. The inverters are designed using a modified Cascaded H-Bridge (CHB) topology, and using a specific modulation strategy namely a Nearest Level Control of Pulse Width Modulation (NLCPWM) with half height method. The performance of the MLI inverters is compare with MLI with conventional techniques and analyzed them in terms of the THD values, input-output power, and power efficiency. The MLI is modelled, designed and simulated using PSIM software. The results showed that without using a filter, the proposed 15level MLI results in a THD of $\mathbf{5 \%}$ and an efficiency of $\mathbf{9 3. 5 3 \%}$. While the proposed 31-level MLI results in a THD value of $2.94 \%$ and an efficiency of $96.55 \%$, showing better performance to conventional MLI.

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