# Design and evaluation of a floating-point division operator based on CORDIC algorithm
> Pongyupinpanich S.

URL kanonis: https://discover.unhas.ac.id/publications/design-and-evaluation-of-a-floating-point-division-operator-based-on-cordic-algo
Jurnal / Konferensi: 2012 9th International Conference on Electrical Engineering Electronics Computer Telecommunications and Information Technology Ecti Con 2012
Tahun terbit: 2012
DOI: https://doi.org/10.1109/ECTICon.2012.6254331
Citations: 3

## Authors
- Pongyupinpanich S.

## Abstract
Design and evaluation of a CORDIC (COordinate Rotation DIgital Computer) algorithm for a floating-point division operation is presented in this paper. In general, division operation based on CORDIC algorithm has a limitation in term of the range of inputs that can be processed by the CORDIC machine to give proper convergence and precise division operation result. A hardware architecture of CORDIC algorithm capable of processing broader input ranges is implemented and presented in this paper by using a pre-processing and a post-processing stage. The performance as well as the calculation error statistics over exhaustive sets of input tests are evaluated. The results show that the CORDIC algorithm can be well-convergence and gives precise division operation results with broader input ranges. The proposed hardware architecture is modeled in VHDL and synthesized on a CMOS standard-cell technology and a FPGA device, resulting 1 GFlops on the CMOS and 210.812 MFlops on the FPGA device.

## Keywords
- CORDIC
- VHDL
- Division (mathematics)
- Field-programmable gate array
- Computer science
- Algorithm
- Division algorithm
- Floating point
- Computer hardware
- CMOS
- Parallel computing
- Arithmetic
- Electronic engineering
- Mathematics
- Engineering

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Sumber: Discover Unhas — RIMS Universitas Hasanuddin.
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